subsys_tse_refclk_125

2017.10.31.03:30:46 Datasheet
Overview

Memory Map

refclk_125

altera_clock_bridge v17.1


Parameters

DERIVED_CLOCK_RATE 125000000
EXPLICIT_CLOCK_RATE 125000000
NUM_CLOCK_OUTPUTS 1
deviceFamily UNKNOWN
generateLegacySim false
  

Software Assignments

(none)
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