subsys_tse_tse

2017.10.31.03:30:56 Datasheet
Overview

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   tse altera_eth_tse 17.1
Memory Map
  tse
control_port 

tse

altera_eth_tse v17.1


Parameters

core_variation MAC_PCS
ifGMII MII_GMII
use_mac_clken false
enable_use_internal_fifo true
enable_ecc false
max_channels 1
transceiver_type GXB
enable_hd_logic true
enable_gmii_loopback true
enable_sup_addr true
stat_cnt_ena true
ext_stat_cnt_ena true
ena_hash true
enable_shift16 true
enable_mac_flow_ctrl true
enable_mac_vlan true
enable_magic_detect true
useMDIO true
mdio_clk_div 40
enable_ena 32
eg_addr 11
ing_addr 11
phy_identifier 0
enable_sgmii true
export_pwrdn false
enable_alt_reconfig false
starting_channel_number 0
phyip_pll_type CMU
phyip_pll_base_data_rate 1250 Mbps
phyip_en_synce_support false
phyip_pma_bonding_mode x1
nf_phyip_rcfg_enable false
XCVR_RCFG_JTAG_ENABLE 0
XCVR_SET_CAPABILITY_REG_ENABLE 0
XCVR_SET_USER_IDENTIFIER 0
XCVR_SET_CSR_SOFT_LOGIC_ENABLE 0
XCVR_SET_PRBS_SOFT_LOGIC_ENABLE 0
enable_timestamping false
enable_ptp_1step false
tstamp_fp_width 4
generateLegacySim false
  

Software Assignments

ENABLE_MACLITE 0
FIFO_WIDTH 32
IS_MULTICHANNEL_MAC 0
MACLITE_GIGE 0
MDIO_SHARED 0
NUMBER_OF_CHANNEL 1
NUMBER_OF_MAC_MDIO_SHARED 1
PCS 1
PCS_ID 0
PCS_SGMII 1
RECEIVE_FIFO_DEPTH 2048
REGISTER_SHARED 0
RGMII 0
TRANSMIT_FIFO_DEPTH 2048
USE_MDIO 1
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