Parameters
bitClearingEdgeCapReg |
true |
bitModifyingOutReg |
false |
captureEdge |
true |
direction |
Input |
edgeType |
ANY |
generateIRQ |
true |
irqType |
EDGE |
resetValue |
0 |
simDoTestBenchWiring |
false |
simDrivenValue |
0 |
width |
4 |
clockRate |
100000000 |
derived_has_tri |
false |
derived_has_out |
false |
derived_has_in |
true |
derived_do_test_bench_wiring |
false |
derived_capture |
true |
derived_edge_type |
ANY |
derived_irq_type |
EDGE |
derived_has_irq |
true |
deviceFamily |
UNKNOWN |
generateLegacySim |
false |
|