jtag_clk
2024.05.11.16:56:44
Datasheet
Overview
Memory Map
altera_clock_bridge_inst
altera_clock_bridge v19.2.0
Parameters
DERIVED_CLOCK_RATE
100000000
EXPLICIT_CLOCK_RATE
100000000
NUM_CLOCK_OUTPUTS
1
deviceFamily
UNKNOWN
generateLegacySim
false
Software Assignments
(none)
generation took 0.00 seconds
rendering took 0.00 seconds