ghrd_10as066n2_dipsw_pio

2017.05.02.00:58:00 Datasheet
Overview

All Components
   dipsw_pio altera_avalon_pio 17.0
Memory Map
  dipsw_pio
s1 

dipsw_pio

altera_avalon_pio v17.0


Parameters

bitClearingEdgeCapReg true
bitModifyingOutReg false
captureEdge true
direction Input
edgeType ANY
generateIRQ true
irqType EDGE
resetValue 0
simDoTestBenchWiring false
simDrivenValue 0
width 4
clockRate 100000000
derived_has_tri false
derived_has_out false
derived_has_in true
derived_do_test_bench_wiring false
derived_capture true
derived_edge_type ANY
derived_irq_type EDGE
derived_has_irq true
deviceFamily UNKNOWN
generateLegacySim false
  

Software Assignments

BIT_CLEARING_EDGE_REGISTER 1
BIT_MODIFYING_OUTPUT_REGISTER 0
CAPTURE 1
DATA_WIDTH 4
DO_TEST_BENCH_WIRING 0
DRIVEN_SIM_VALUE 0
EDGE_TYPE ANY
FREQ 100000000
HAS_IN 1
HAS_OUT 0
HAS_TRI 0
IRQ_TYPE EDGE
RESET_VALUE 0
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