subsys_dp_clk_16

2017.05.02.00:58:20 Datasheet
Overview

Memory Map

clk_16

altera_clock_bridge v17.0


Parameters

DERIVED_CLOCK_RATE 0
EXPLICIT_CLOCK_RATE 16000000
NUM_CLOCK_OUTPUTS 1
deviceFamily UNKNOWN
generateLegacySim false
  

Software Assignments

(none)
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