subsys_pcie_pb_addr_0

2017.05.02.01:01:39 Datasheet
Overview

All Components
   pb_addr_0 altera_avalon_mm_bridge 17.0
Memory Map

pb_addr_0

altera_avalon_mm_bridge v17.0


Parameters

DATA_WIDTH 128
SYMBOL_WIDTH 8
ADDRESS_WIDTH 29
SYSINFO_ADDR_WIDTH 28
USE_AUTO_ADDRESS_WIDTH 1
AUTO_ADDRESS_WIDTH 28
HDL_ADDR_WIDTH 28
ADDRESS_UNITS SYMBOLS
BURSTCOUNT_WIDTH 6
MAX_BURST_SIZE 32
MAX_PENDING_RESPONSES 16
LINEWRAPBURSTS 0
PIPELINE_COMMAND 1
PIPELINE_RESPONSE 1
USE_RESPONSE 0
deviceFamily UNKNOWN
generateLegacySim false
  

Software Assignments

(none)
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