Parameters
bitClearingEdgeCapReg |
false |
bitModifyingOutReg |
false |
captureEdge |
false |
direction |
InOut |
edgeType |
RISING |
generateIRQ |
false |
irqType |
LEVEL |
resetValue |
0 |
simDoTestBenchWiring |
false |
simDrivenValue |
0 |
width |
4 |
clockRate |
100000000 |
derived_has_tri |
false |
derived_has_out |
true |
derived_has_in |
true |
derived_do_test_bench_wiring |
false |
derived_capture |
false |
derived_edge_type |
NONE |
derived_irq_type |
NONE |
derived_has_irq |
false |
deviceFamily |
UNKNOWN |
generateLegacySim |
false |
|